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Digic boot

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DIGIC 5 (S100)Edit

BootEdit

0xC0410000 <- 0

FF000038 MOV R0, #0xC000002F
FF00003C MCR p15, 0, R0,c6,c1, 0

0xC020010C <- 1
0xC020000C/1C/.../FC <- 0xFF
0xC0400008 <- 0x430005
1 <- 0xC0243100 (yes, strange)
0xC0242010 <- 0xC0242010 or 1

DIGIC 4 bootEdit

S90Edit

0xC0410000 <- 0

ROM:FF810038 MOV R0, #0xC000002F
ROM:FF81003C MCR p15, 0, R0,c6,c1, 0

0xC020010C <- 1
0xC020000C/1C/.../FC <- 0xFF
0xC0400008 <- 0x430005
1 <- 0xC0243100 (yes, strange)
0xC0242010 <- 0xC0242010 or 1


550d (0xFF010000)Edit

0xC0000010 <- 0xD9C5D9C5
0xC020010C <- 1
0xC020000C/1C/.../FC <- 0xFF
0xC0400008 <- 0x430005
1 <- 0xC0243100 (yes, strange)
0xC0242010 <- 0xC0242010 or 1

550d (FFFF0044 reset_irq)Edit

(in seq of execution)
0xC0300000 <- ( ( value_in_0xC0300000 & 0xFFFFE000 ) |  0x1550 ). (disable digic ?)
0xC0000028 <- 7 
0xC000002C <- C
0xC0000030 <- 0x80100C
0xC0000034 <- 6
0xC0000038 <- E
0xC000003C <- 0x80100E
0xC0000040 <- 0x16
0xC0000044 <- 0
0xC0000048 <- 0x201000
0xC0000024 <- 1
0xC0000014 <- 0xD9C5D9C5
0xC0000018 <- 0
0xC022F030 <- 1
0xC04000C8 <- 1
0xC040007C <- 2
0xC0400128 <- 0x7070707
0xC0300228 <- 2
0xC0400004 <- BIC  value_in_C0400004, #3.  See Timer.Clock_Module
0xC04000B4 <- BIC  value_in_C04000B4, #1
0xC04000B8 <- 0x1B45248
0xC04000B4 <- value_in_C04000B4 or 1

FFFF01B0                 LDR     R0, =0xC04000A4
FFFF01B4
FFFF01B4 loc_FFFF01B4                           
FFFF01B4                 LDR     R1, [R0]
FFFF01B8                 ANDS    R1, R1, #1   (wait for bit #0 to be set)
FFFF01BC                 BEQ     loc_FFFF01B4

0xC0400004 <- value_in_C0400004 or 3 (set bits 0 and 1)
0xC0400008 <- value_in_C0400008 or 0x1010000
0xC0800010 <- 0x18
0xC0800018 <- 4
0xC0800008 <- 0x8081
0xC022F090 <- 0x1209
0xC022F094 <- 0x5229
0xC022F098 <- 0x5229
0xC022F09C <- 0x5229
0xC022F0A0 <- 0x5229
0xC022F0A4 <- 0xD269
0xC022F0A8 <- 0xD269
0xC022F0AC <- 0x1209
0xC022F080 <- 0x2100F0E
0xC022F084 <- 0x6C800004
0xC022F08C <- 0x310
0xC022F0D0 <- 0
0xC022F0D4 <- 0
0xC022F124 <- 0
0xC022F110 <- 0x102
0xC022F114 <- 0x600
0xC022F168 <- 0x1010101
0xC022F16C <- 0
0xC022F170 <- 0
0xC022F174 <- 0x1111
0xC022F178 <- 0
0xC022F128 <- 1
0xC022F134, 0xC022F138 <- 0
0xC022F13C <- 2
0xC022F140 <- 0x4040404
0xC022F144 <- 0x2020202
0xC022F148 <- 0x130011
0xC022F06C <- 0
0xC022F164 <- 0xE
0xC022F180 <- 0xF
0xC022F184 <- 1

0xC0400008 <- value_in_C0400008 or 0x1

0xC022F120 <- 2
0xC022F164 <- 0xE
0xC022F188 <- 4
0xC022F18C <- 0x103
0xC022F190 <- 0x3333
0xC022F194 <- 0
0xC022F188 <- 0xE

0xC022F198 <- 0
0xC022F19C <- 0xABC. See ABC
0xC022F198 <- 2

FFFF0408                 LDR     R0, =0xC022F198
FFFF040C loc_FFFF040C                          
FFFF040C                 LDR     R1, [R0]
FFFF0410                 ANDS    R1, R1, #1   (wait bit#0 set)
FFFF0414                 BEQ     loc_FFFF040C

0xC022F18C <- 0x107
0xC022F198 <- 0
0xC022F19C <- 0xABC 

0xC022F198 <- 2
loop to wait bit #0 of 0xC022F198 being set
0xC0100200 <- 0xC0000000
0xC0100204 <- 0x5000000
0xC0100208 <- 0xFFFF
0xC010020C <- 0x400420
0xC0100210 <- 0x1112000
0xC0100214 <- 0x20013
0xC0100220 <- 0xAF020000
0xC0100370 <- 0x8810
0xC0100380 <- 0
0xC0100384 <- 0
0xC0100400 <- 0xF0000
0xC0100410 <- 0
0xC0100420 <- 0
0xC0100430 <- 0
0xC0100404 <- 0x20220
0xC0100414 <- 0x20220
0xC0100424 <- 0x20220
0xC0100434 <- 0x20220

0xC022F164 <- 0xC

0xC0100310 <- 0
0xC0100340 <- 0
0xC0100350 <- 0
0xC0100338 <- 2
0xC0100328 <- 0x532

0xC0100310 <- 0
0xC0100300 <- 0xE0000000 (4 times!)
0xC0100328 <- 0x432

0xC0100338 <- 0x382
0xC0100338 <- 2

0xC040012C <- 1

0xC0210600 <- 0xD00
0xC0210600 <- 0x1E01
0xC022F164 <- 0

configure ARM memory regions

0xC0300208 <- 1 (enable digic ?)

"<<<<< Boot loader Ver 0.13 >>>>>\n\r"
"<K270 Board> SystemCLK 132MHz\n\r"

"Please Input Command\n\r"
FFFF06CC                 BL      scanf_maybe

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